Workgroup Efficient Embedded Systems Hochschule Augsburg
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The ParaNut Processor

ParaNut Example The goal of the ParaNut project is to develop an open, scalable and practically usable multi-core processor architecture for embedded systems. Scalability is provided by a special focus on parallelism at thread level and data level. A ParaNut consists of an arbitrary number of simple processing cores, each of which is capable of performing 32 bit RISC operations.

The ParaNut introduces a new concept for SIMD (single instruction, multiple data) vectorization. Whereas SIMD extentsions for workstation processors or embbeded systems frequently contain specialized instructions leading to an inherently bad compiler support, SIMD code for the ParaNut can be programmed in a high-level language according to a paradigm similar to thread programming.

The instruction set is kept compatible to the OpenRISC 1000 specification. Hence, the OpenRISC GCC tool chain and libraries/operation systems (newlib, Linux with some necessary extensions) can be used with the ParaNut architecture as well.

Download Article on the project (embedded world conference 2015)
Source Code Snapshot (Feb 27, 2015)
30.7.2018 - Michael Schäferling